描述
VMIVME-4140-001 VMIVME4140
在电路设计后，为了进行工作验证，需要组装电路进行实验。但是结果会经常出现不按设计那样工作。例如设计的放大器却变成了振荡器，在模拟电路中由于混入数字电路来的噪声，使模拟信号的波形失真、工作不稳定、不能顺利得到数据。对低频电路来说，无论谁组装，只要布线不接错，各种不同的安装、布线、电路特性几乎没有差异，可得到相同的数据。但是高频却不同了，由于安装方法不同，一般会得到不同特性的数据。
在高频电路及高速数字电路中，如果有一条线就会形成电感成分（寄生），如果有两条线则在线间就会形成寄生电容成分及互感成分（寄生），即所谓三寄生。所形成的三寄生数值是很微小的，因此在低频时几乎不成问题，但是在高频领域却不能忽略该C、L成分的影响。
最近为了提高机器的性能，经常将从低频到高频的模拟电路、高速数字电路、微型模拟电路及大电流电路等各种电路混在一起，这样会造成电路的不稳定及频率特性恶化。其中主要原因就是在设计时未充分考虑上述三寄生，而无法维持可靠性和安全性。
另外，电路图中只用二维表现半导体器件及R、C、L的集中参数，但这并不能代表实际电路的性能和功能。实际的动作是三维空间，包括频率就是四维空间了。因此，由交调失真、反射、静电、电磁结合形成的微电流电路在高频电路中会对特性、功能造成影响。最近的IC想根据时代的要求，很多是高速动作的器件，对高频噪声的响应很敏感。因此在使用器件时要根据电路功能选择相应的元器件，尽量避免使用高于要求的高速IC。
在电路图中通常将电源、地线、信号线的阻抗均按零欧姆考虑的。但是实际上是不存在零欧姆的，而且频率越高，电感和寄生电容的影响越大。结果，电路相互结合及外部电磁场的影响大到不能忽略的程度，造成电路不稳定及频率特性恶化。在模拟电路中应解决误差、噪声及时间延迟问题；而数字电路中解决抗噪声，通过同步使之不受时间延迟的影响，对改善电路特性是非常重要的。
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